; DMX Light Board Code ; mit DMX-Startadresse, allerdings ungetestet. ; erstellt 07.10.2012 ; changes by wolf ; Speed: 8Mhz ; Input: 8 analog Fader ; Output: DMX 512 Signal (250000 Baud) ; Target: AT90S2313 ; Port B,7 -> SW6 ; Port B,6 -> SW5 ; Port B,5 -> SW4 ; Port B,4 -> SW3 ; Port B,3 -> SW2 ; Port B,2 -> SW1 ; Port B,1 -> LED(Grün),- ; Port B,0 -> LCD,E ; Port D,6 -> MULTI,C ;LCD,D7 ; Port D,5 -> MULTI,B ;LCD,D6 ; Port D,4 -> MULTI,A ;LCD,D5 ; Port D,3 -> ADW,CLK; LCD,D4 ; Port D,2 -> ADW,CS ; Port D,1 (TxD) -> 75176,D ; Port D,0 -> ADW,DATA; LCD,RS ; ; r0-r7 -> DMX Channel Registers ; r8-r15 -> Fader Input Registers ; r16 -> TEMP Register ; r17 -> LCD_BYTE ; r24 -> LCD_ADDR ; r25 -> LCD_DATA ; r18 -> ADW_BYTE ; r19 -> DMX_BYTE ; r20 -> Current Fader Number ; r21-r23 -> Delay Count Registers .include "2313def.inc" ; Definitions .def MASTER =r0 .def SPEED =r1 .def LCD_DATA =r2 .def LCD_ADDR =r3 .def SPLIT0 =r4 .def SPLIT1 =r5 .def SPLIT2 =r6 .def DELAY_COUNT_0 =r7 .def DELAY_COUNT_1 =r8 .def CASER_DELAY =r9 .def DMX_BYTE =r10 .def TEMP3 =r11 .def CASER_POS =r12 .def CASER_MASTER =r13 .def INPUT_DELAY =r14 .def TEMP =r16 .def LCD_BYTE =r17 .def ADW_BYTE =r18 .def FADER_ADRESS =r19 .def AUTO_STATE =r20 .def DELAY_TEMP =r21 .def ADD_TEMP =r22 .def SPLIT =r23 .def MENUE =r24 .def TEMP2 =r25 .def mc8u =r7 ;multiplicand .def mcnt8u =r23 ;loop counter .def mp8u =r26 ;multiplier .def m8uL =r26 ;result Low byte .def m8uH =r27 ;result High byte .def drem16uL=r23 .def drem16uH=r15 .def dres16uL=r26 .def dres16uH=r27 .def dd16uL =r26 .def dd16uH =r27 .def dv16uL =r18 .def dv16uH =r19 .def dcnt16u =r6 ; Interrupts .org $0000 rjmp RESET nop nop nop nop nop nop nop DELAY_0: ldi DELAY_TEMP,255 mov DELAY_COUNT_0,DELAY_TEMP DELAY_JUMP_0: dec DELAY_COUNT_0 nop brbc 1,DELAY_JUMP_0 ret DELAY_1: ldi DELAY_TEMP,128 mov DELAY_COUNT_1,DELAY_TEMP DELAY_JUMP_1: dec DELAY_COUNT_1 brbc 1,DELAY_JUMP_1 ret DELAY_SHORT: ret DELAY_LONG: ldi DELAY_TEMP,0xFF mov DELAY_COUNT_0,DELAY_TEMP mov DELAY_COUNT_1,DELAY_TEMP DELAY_LONG0: ldi DELAY_TEMP,0xFF mov DELAY_COUNT_0,DELAY_TEMP DELAY_LONG0_JUMP:dec DELAY_COUNT_0 brbc 1,DELAY_LONG0_JUMP dec DELAY_COUNT_1 brbc 1,DELAY_LONG0 ret mpy8u: clr m8uH ;clear result High byte ldi mcnt8u,8 ;init loop counter lsr mp8u ;rotate multiplier m8u_1: brcc m8u_2 ;carry set add m8uH,mc8u ;add multiplicand to result High byte m8u_2: ror m8uH ;rotate right result High byte ror m8uL ;rotate right result L byte and multiplier dec mcnt8u ;decrement loop counter brne m8u_1 ;if not done, loop more ret div16u: clr drem16uL ;clear remainder Low byte sub drem16uH,drem16uH;clear remainder High byte and carry ldi ADD_TEMP,17 mov dcnt16u,ADD_TEMP;init loop counter d16u_1: rol dd16uL ;shift left dividend rol dd16uH dec dcnt16u ;decrement counter brne d16u_2 ;if done ret ; return d16u_2: rol drem16uL ;shift dividend into remainder rol drem16uH sub drem16uL,dv16uL ;remainder = remainder - divisor sbc drem16uH,dv16uH ; brcc d16u_3 ;if result negative add drem16uL,dv16uL ; restore remainder adc drem16uH,dv16uH clc ; clear carry to be shifted into result rjmp d16u_1 ;else d16u_3: sec ; set carry to be shifted into result rjmp d16u_1 SEND_DMX_BYTE: sbi UCR,0 ;Set 9th Bit (Stoppbit 1) sbi UCR,3 ;Enable Transmitter out UDR,DMX_BYTE ;Byte must be in DMX_BYTE-Register rcall READ_FADER WAIT_SENDING: sbis USR,6 ;Wait until Bit is send rjmp WAIT_SENDING cbi UCR,3 ;Disable Transmitter sbi USR,6 ;Clear TX Complete Flag by writing a 1 to it ret SEND_LCD_BYTE: cbi PORTD,6 cbi PORTD,5 cbi PORTD,4 cbi PORTD,3 sbrc LCD_BYTE,7 sbi PORTD,6 sbrc LCD_BYTE,6 sbi PORTD,5 sbrc LCD_BYTE,5 sbi PORTD,4 sbrc LCD_BYTE,4 sbi PORTD,3 nop sbi PORTB,0 rcall DELAY_1 cbi PORTB,0 rcall DELAY_1 cbi PORTD,6 cbi PORTD,5 cbi PORTD,4 cbi PORTD,3 sbrc LCD_BYTE,3 sbi PORTD,6 sbrc LCD_BYTE,2 sbi PORTD,5 sbrc LCD_BYTE,1 sbi PORTD,4 sbrc LCD_BYTE,0 sbi PORTD,3 nop sbi PORTB,0 rcall DELAY_1 cbi PORTB,0 rcall DELAY_1 ret SEND_LCD: sbi DDRD,0 mov LCD_BYTE,LCD_ADDR ldi ADD_TEMP,128 add LCD_BYTE,ADD_TEMP cbi PORTD,0 rcall SEND_LCD_BYTE mov LCD_BYTE,LCD_DATA sbi PORTD,0 rcall SEND_LCD_BYTE cbi PORTD,0 cbi DDRD,0 ret READ_ADW: cbi DDRD,0 cbi PORTD,0 cbi PORTD,3 cbi PORTD,2 rcall DELAY_SHORT ldi ADW_BYTE,0 ldi ADD_TEMP,8 ADW_LOOP: sbi PORTD,3 rcall DELAY_SHORT lsl ADW_BYTE sbic PIND,0 sbr ADW_BYTE,1 cbi PORTD,3 rcall DELAY_SHORT dec ADD_TEMP cpi ADD_TEMP,0 brne ADW_LOOP sbi PORTD,2 ret READ_FADER: cpi FADER_ADRESS,128 breq ENDE_READ_FADER cbi PORTD,4 cbi PORTD,5 cbi PORTD,6 sbrc FADER_ADRESS,0 sbi PORTD,4 sbrc FADER_ADRESS,1 sbi PORTD,5 sbrc FADER_ADRESS,2 sbi PORTD,6 rcall READ_ADW cpi FADER_ADRESS,8 brsh ENDE_READ_FADER cpi FADER_ADRESS,0 breq FADER_0 ldi YH,0 ldi YL,119 add YL,FADER_ADRESS st Y,ADW_BYTE rjmp ENDE_READ_FADER FADER_0: sts 127,ADW_BYTE ENDE_READ_FADER: ret DISPLAY_OUT: ldi YH,0 ldi YL,0x60 ldi ADD_TEMP,0 mov LCD_ADDR,ADD_TEMP DISP_LOOP_1: ld LCD_DATA,Y rcall SEND_LCD inc YL inc LCD_ADDR cpi YL,0x68 brlo DISP_LOOP_1 ldi ADD_TEMP,64 mov LCD_ADDR,ADD_TEMP DISP_LOOP_2: ld LCD_DATA,Y rcall SEND_LCD inc YL inc LCD_ADDR cpi YL,0x70 brlo DISP_LOOP_2 ret SPLIT_DIGITS: ldi ADD_TEMP,0x00 mov SPLIT2,ADD_TEMP mov SPLIT1,ADD_TEMP SPLT2_TEST: cpi SPLIT,100 brlo SPLT1_TEST inc SPLIT2 subi SPLIT,100 rjmp SPLT2_TEST SPLT1_TEST: cpi SPLIT,10 brlo SPLT0_TEST inc SPLIT1 subi SPLIT,10 rjmp SPLT1_TEST SPLT0_TEST: mov SPLIT0,SPLIT ldi ADD_TEMP,48 add SPLIT2,ADD_TEMP add SPLIT1,ADD_TEMP add SPLIT0,ADD_TEMP sts 0x6A,SPLIT2 ;D2 sts 0x6B,SPLIT1 ;D1 sts 0x6C,SPLIT0 ;D0 rcall DISPLAY_OUT ; rjmp ENDE_DISP_AKT ret DISPLAY_AKTUAL: cpi MENUE,0 brne TEST_MENU_1 ldi ADD_TEMP,32 sts 0x60,ADD_TEMP ; ldi ADD_TEMP,68 sts 0x61,ADD_TEMP ;D ldi ADD_TEMP,105 sts 0x62,ADD_TEMP ;i ldi ADD_TEMP,114 sts 0x63,ADD_TEMP ;r ldi ADD_TEMP,101 sts 0x64,ADD_TEMP ;e ldi ADD_TEMP,99 sts 0x65,ADD_TEMP ;c ldi ADD_TEMP,116 sts 0x66,ADD_TEMP ;t ldi ADD_TEMP,32 sts 0x67,ADD_TEMP ; sts 0x68,ADD_TEMP ; sts 0x69,ADD_TEMP ; sbrs AUTO_STATE,0 rjmp D_DIREKT_AUS ldi ADD_TEMP,79 sts 0x6A,ADD_TEMP ;O ldi ADD_TEMP,110 sts 0x6B,ADD_TEMP ;n ldi ADD_TEMP,32 sts 0x6C,ADD_TEMP ; rjmp D_DIREKT_WEITER D_DIREKT_AUS: ldi ADD_TEMP,79 sts 0x6A,ADD_TEMP ;O ldi ADD_TEMP,102 sts 0x6B,ADD_TEMP ;f sts 0x6C,ADD_TEMP ;f D_DIREKT_WEITER: ldi ADD_TEMP,32 sts 0x6D,ADD_TEMP ; sts 0x6E,ADD_TEMP ; sts 0x6F,ADD_TEMP ; rcall DISPLAY_OUT rjmp ENDE_DISP_AKT TEST_MENU_1: cpi MENUE,1 brne TEST_MENU_2 ldi ADD_TEMP,32 sts 0x60,ADD_TEMP ; ldi ADD_TEMP,83 sts 0x61,ADD_TEMP ;S ldi ADD_TEMP,122 sts 0x62,ADD_TEMP ;z ldi ADD_TEMP,101 sts 0x63,ADD_TEMP ;e ldi ADD_TEMP,110 sts 0x64,ADD_TEMP ;n ldi ADD_TEMP,101 sts 0x65,ADD_TEMP ;e ldi ADD_TEMP,32 sts 0x66,ADD_TEMP ; sts 0x67,ADD_TEMP ; sts 0x68,ADD_TEMP ; sts 0x69,ADD_TEMP ; sbrs AUTO_STATE,1 rjmp D_SZENE_AUS ldi ADD_TEMP,79 sts 0x6A,ADD_TEMP ;O ldi ADD_TEMP,110 sts 0x6B,ADD_TEMP ;n ldi ADD_TEMP,32 sts 0x6C,ADD_TEMP ; rjmp D_SZENE_WEITER D_SZENE_AUS: ldi ADD_TEMP,79 sts 0x6A,ADD_TEMP ;O ldi ADD_TEMP,102 sts 0x6B,ADD_TEMP ;f sts 0x6C,ADD_TEMP ;f D_SZENE_WEITER: ldi ADD_TEMP,32 sts 0x6D,ADD_TEMP ; sts 0x6E,ADD_TEMP ; sts 0x6F,ADD_TEMP ; rcall DISPLAY_OUT rjmp ENDE_DISP_AKT TEST_MENU_2: cpi MENUE,2 brne TEST_MENU_3 ldi ADD_TEMP,32 sts 0x60,ADD_TEMP ; ldi ADD_TEMP,67 sts 0x61,ADD_TEMP ;C ldi ADD_TEMP,104 sts 0x62,ADD_TEMP ;h ldi ADD_TEMP,97 sts 0x63,ADD_TEMP ;a ldi ADD_TEMP,115 sts 0x64,ADD_TEMP ;s ldi ADD_TEMP,101 sts 0x65,ADD_TEMP ;e ldi ADD_TEMP,114 sts 0x66,ADD_TEMP ;r ldi ADD_TEMP,32 sts 0x67,ADD_TEMP ; sts 0x68,ADD_TEMP ; sts 0x69,ADD_TEMP ; sbrs AUTO_STATE,2 rjmp D_CASER_AUS ldi ADD_TEMP,79 sts 0x6A,ADD_TEMP ;O ldi ADD_TEMP,110 sts 0x6B,ADD_TEMP ;n ldi ADD_TEMP,32 sts 0x6C,ADD_TEMP ; ldi ADD_TEMP,49 add ADD_TEMP,CASER_POS sts 0x6D,ADD_TEMP ;x rjmp D_CASER_WEITER D_CASER_AUS: ldi ADD_TEMP,79 sts 0x6A,ADD_TEMP ;O ldi ADD_TEMP,102 sts 0x6B,ADD_TEMP ;f sts 0x6C,ADD_TEMP ;f ldi ADD_TEMP,32 sts 0x6D,ADD_TEMP ; D_CASER_WEITER: ldi ADD_TEMP,32 sts 0x6E,ADD_TEMP ; sts 0x6F,ADD_TEMP ; rcall DISPLAY_OUT rjmp ENDE_DISP_AKT TEST_MENU_3: cpi MENUE,3 brne TEST_MENU_4 rcall clr_disp ldi ADD_TEMP,83 sts 0x61,ADD_TEMP ;S ldi ADD_TEMP,112 sts 0x62,ADD_TEMP ;p ldi ADD_TEMP,101 sts 0x63,ADD_TEMP ;e sts 0x64,ADD_TEMP ;e ldi ADD_TEMP,100 sts 0x65,ADD_TEMP ;d mov SPLIT,SPEED rcall SPLIT_DIGITS ; ldi ADD_TEMP,48 ; add SPLIT2,ADD_TEMP ; add SPLIT1,ADD_TEMP ; add SPLIT0,ADD_TEMP ; sts 0x6A,SPLIT2 ;D2 ; sts 0x6B,SPLIT1 ;D1 ; sts 0x6C,SPLIT0 ;D0 ; rcall DISPLAY_OUT rjmp ENDE_DISP_AKT TEST_MENU_4: cpi MENUE,4 brne TEST_MENU_5 rcall clr_disp ldi ADD_TEMP,77 sts 0x61,ADD_TEMP ;M ldi ADD_TEMP,97 sts 0x62,ADD_TEMP ;a ldi ADD_TEMP,115 sts 0x63,ADD_TEMP ;s ldi ADD_TEMP,116 sts 0x64,ADD_TEMP ;t ldi ADD_TEMP,101 sts 0x65,ADD_TEMP ;e ldi ADD_TEMP,114 sts 0x66,ADD_TEMP ;r mov SPLIT,MASTER rcall SPLIT_DIGITS ; ldi ADD_TEMP,48 ; add SPLIT2,ADD_TEMP ; add SPLIT1,ADD_TEMP ; add SPLIT0,ADD_TEMP ; sts 0x6A,SPLIT2 ;D2 ; sts 0x6B,SPLIT1 ;D1 ; sts 0x6C,SPLIT0 ;D0 ; rcall DISPLAY_OUT rjmp ENDE_DISP_AKT TEST_MENU_5: cpi MENUE,5 brne TEST_MENU_X rcall clr_disp ldi ADD_TEMP,67 sts 0x60,ADD_TEMP ;C ldi ADD_TEMP,104 sts 0x61,ADD_TEMP ;h ldi ADD_TEMP,97 sts 0x62,ADD_TEMP ;a ldi ADD_TEMP,115 sts 0x63,ADD_TEMP ;s ldi ADD_TEMP,101 sts 0x64,ADD_TEMP ;e ldi ADD_TEMP,114 sts 0x65,ADD_TEMP ;r ldi ADD_TEMP,77 sts 0x66,ADD_TEMP ;M ldi ADD_TEMP,65 sts 0x67,ADD_TEMP ;A mov SPLIT,CASER_MASTER rcall SPLIT_DIGITS ; ldi ADD_TEMP,48 ; add SPLIT2,ADD_TEMP ; add SPLIT1,ADD_TEMP ; add SPLIT0,ADD_TEMP ; sts 0x6A,SPLIT2 ;D2 ; sts 0x6B,SPLIT1 ;D1 ; sts 0x6C,SPLIT0 ;D0 ; rcall DISPLAY_OUT rjmp ENDE_DISP_AKT TEST_MENU_X: cpi MENUE,14 brsh ENDE_DISP_AKT rcall clr_disp ldi ADD_TEMP,83 sts 0x61,ADD_TEMP ;S sts 0x69,ADD_TEMP ;S ldi ADD_TEMP,122 sts 0x62,ADD_TEMP ;z ldi ADD_TEMP,101 sts 0x63,ADD_TEMP ;e sts 0x65,ADD_TEMP ;e sts 0x6C,ADD_TEMP ;e ldi ADD_TEMP,110 sts 0x64,ADD_TEMP ;n ldi ADD_TEMP,97 sts 0x6A,ADD_TEMP ;a ldi ADD_TEMP,118 sts 0x6B,ADD_TEMP ;v ldi ADD_TEMP,63 sts 0x6D,ADD_TEMP ;? ldi ADD_TEMP,43 add ADD_TEMP,MENUE sts 0x66,ADD_TEMP ;x rcall DISPLAY_OUT ENDE_DISP_AKT: ret SEND_SAVE_DISP: ldi ADD_TEMP,83 sts 0x68,ADD_TEMP ;S ldi ADD_TEMP,97 sts 0x69,ADD_TEMP ;a ldi ADD_TEMP,118 sts 0x6A,ADD_TEMP ;v ldi ADD_TEMP,105 sts 0x6B,ADD_TEMP ;i ldi ADD_TEMP,110 sts 0x6C,ADD_TEMP ;n ldi ADD_TEMP,103 sts 0x6D,ADD_TEMP ;g ldi ADD_TEMP,46 sts 0x6E,ADD_TEMP ;. sts 0x6F,ADD_TEMP ;. rcall DISPLAY_OUT ret SAVE_SZENE: ldi YH,0 ldi DELAY_TEMP,0 SAVE_LOOP: mov mp8u,MENUE subi mp8u,6 ldi ADD_TEMP,8 mov mc8u,ADD_TEMP rcall mpy8u add m8ul,DELAY_TEMP out EEAR,m8uL sbi EECR,0 ldi YL,0x78 add YL,DELAY_TEMP ld TEMP,Y in TEMP2,EEDR cp TEMP,TEMP2 breq NO_WRITE out EEDR,TEMP sbi EECR,2 sbi EECR,1 WRITE_END: sbic EECR,1 rjmp WRITE_END NO_WRITE: inc DELAY_TEMP cpi DELAY_TEMP,8 brlo SAVE_LOOP sbr TEMP,8 rcall SEND_SAVE_DISP sbr AUTO_STATE,128 ldi ADD_TEMP,255 mov INPUT_DELAY,ADD_TEMP ret ; changes Beginn sts1: sts 0x70,TEMP sts 0x71,TEMP sts 0x72,TEMP sts 0x73,TEMP sts 0x74,TEMP sts 0x75,TEMP sts 0x76,TEMP sts 0x77,TEMP ret clr_disp: ldi ADD_TEMP, 32 sts 0x60,ADD_TEMP ; sts 0x66,ADD_TEMP ; sts 0x67,ADD_TEMP ; sts 0x68,ADD_TEMP ; sts 0x69,ADD_TEMP ; sts 0x6D,ADD_TEMP ; sts 0x6E,ADD_TEMP ; sts 0x6F,ADD_TEMP ; ret DMX_Plus: inc r15 ;rcall DELAY_0 mov split, r15 rcall split_digits rcall DELAY_0 ret DMX_Minus: dec r15 ;rcall DELAY_0 mov split, r15 rcall split_digits rcall DELAY_0 ret ; changes End RESET: ldi TEMP,low(RAMEND) ;Set SP to last Byte in RAM out SPL,TEMP ldi TEMP,0x03 ;Set TRI-States out DDRB,TEMP ldi TEMP,0xFE out PORTB,TEMP ldi TEMP,0x7E out DDRD,TEMP ldi TEMP,0x06 out PORTD,TEMP ldi TEMP,0x00 ;Set Current DMX Adress and Memory_Pointer for PC mov FADER_ADRESS,TEMP mov DMX_BYTE,TEMP mov SPEED,TEMP mov MENUE,TEMP mov CASER_DELAY,TEMP ldi TEMP,0xFF mov MASTER,TEMP mov CASER_MASTER,TEMP ldi TEMP,0x01 mov AUTO_STATE,TEMP ldi TEMP,0x1A mov INPUT_DELAY,TEMP ldi TEMP,150 mov SPEED,TEMP ldi TEMP,7 mov CASER_POS,TEMP rcall DELAY_LONG ;Init Display sbi DDRD,0 cbi PORTD,6 cbi PORTD,5 sbi PORTD,4 cbi PORTD,3 cbi PORTD,0 nop sbi PORTB,0 rcall DELAY_1 cbi PORTB,0 rcall DELAY_1 ldi LCD_BYTE,12 ;Init Display rcall SEND_LCD_BYTE cbi DDRD,0 ldi TEMP,0x01 ;Load UART Bautrate Register with 0x01 out UBRR,TEMP ;Load UART Bautrate Register with 0x01 sbi UCR,2 ;Enable 9-Bit Mode rcall DISPLAY_AKTUAL ;***************Changes Beginn ; ldi TEMP,0x01 ;Load UART Bautrate Register with 0x01 ; out UBRR,TEMP ;Load UART Bautrate Register with 0x01 ; sbi UCR,2 ;Enable 9-Bit Mode; ; rcall DISPLAY_AKTUAL ;nach den obigen Zeilen das einsetzen: (ist das Ende der Resetroutine) ldi temp,0x25 out EEAR,temp sbi EECR,EERE in temp,EEDR mov r15, temp ldi ADD_TEMP,68 sts 0x60,ADD_TEMP ;D ldi ADD_TEMP,77 sts 0x61,ADD_TEMP ;M ldi ADD_TEMP,88 sts 0x62,ADD_TEMP ;X ldi ADD_TEMP,45 sts 0x63,ADD_TEMP ;- ldi ADD_TEMP,65 sts 0x64,ADD_TEMP ;A ldi ADD_TEMP, 100 sts 0x65,ADD_TEMP ;d ldi ADD_TEMP,114 sts 0x66,ADD_TEMP ;r ldi ADD_TEMP,32 sts 0x66,ADD_TEMP ;: sts 0x67,ADD_TEMP ; sts 0x68,ADD_TEMP ; sts 0x69,ADD_TEMP ; rcall display_out ;sts 0x0080, r15 ;Button1=addtemp,2 ;Button2=addtemp,3 ;Button3=addtemp,4 ;Button4=addtemp,5 ;Button5=addtemp,6 ;Button6=addtemp,7 dmx_routine: rcall DELAY_0 in add_temp, pinb sbrs add_temp, 2 ;Taster an PB2 (Funktion DMX-Adresse +1) rcall DMX_Plus sbrs add_temp, 3 ;Taster an PB3 (Funktion: DMX-Adresse -1) rcall DMX_Minus sbrs add_temp, 4 ;Taster an PB4 (Funktion: Beenden und wenn DMX-Adresse geaendert, in eprom speichern) rjmp reset1 rjmp dmx_routine reset1: ;lds add_temp, 0x0080 ;cp add_temp, r15 cp temp, r15 breq main WRITE_EEPROM_x25: ;SAVE_DMX sbic EECR,1 rjmp WRITE_EEPROM_x25 ldi ADD_TEMP,0x25 out EEAR,ADD_TEMP out EEDR,r15 sbi EECR,EEMWE sbi EECR,EEWE sts 0x0080, r15 ;hier gehts mit der MAIN-Routine weiter MAIN: rcall DELAY_0 cbi PORTD,1 ;TxD -> Low ;Send Break rcall DELAY_0 sbi PORTD,1 ;TxD -> High rcall DELAY_1 ldi FADER_ADRESS,128 ldi ADD_TEMP,0x00 ;Send Startbyte mov DMX_BYTE,ADD_TEMP rcall SEND_DMX_BYTE rcall DELAY_1 ldi ZH,0x00 ldi ZL,0x70 ldi FADER_ADRESS,0 lds r15, 0x0080 tst r15 breq DMX_LOOP wait_for_startadress: dec r15 clr DMX_BYTE rcall SEND_DMX_BYTE tst r15 brne wait_for_startadress ;***************Changes End DMX_LOOP: ld DMX_BYTE,Z ;Send 1. Data-Byte with DMX String rcall SEND_DMX_BYTE rcall DELAY_1 inc FADER_ADRESS inc ZL cpi ZL,0x78 brlo DMX_LOOP sbrs AUTO_STATE,7 rjmp GET_INPUT ldi ADD_TEMP,1 cp INPUT_DELAY,ADD_TEMP brsh NO_DISP_WEITER cbr AUTO_STATE,128 rjmp GET_INPUT NO_DISP_WEITER: dec INPUT_DELAY rjmp NO_DISPLAY_AKT GET_INPUT: in TEMP,PINB sbrs TEMP,3 rjmp PONE sbrs TEMP,5 rjmp PONE ldi ADD_TEMP,1 cp INPUT_DELAY,ADD_TEMP brsh NO_INPUT ldi ADD_TEMP,0x1A mov INPUT_DELAY,ADD_TEMP sbrs TEMP,2 rjmp MENUE_P sbrs TEMP,4 rjmp MENUE_M sbrs TEMP,6 nop ldi ADD_TEMP,0 mov INPUT_DELAY,ADD_TEMP rjmp NO_BUTTON NO_INPUT: dec INPUT_DELAY; rjmp NO_BUTTON MENUE_P: inc MENUE cpi MENUE,14 brne ENDE_MENUE_P ldi MENUE,0 ENDE_MENUE_P: rjmp NO_BUTTON MENUE_M: dec MENUE cpi MENUE,255 brne ENDE_MENUE_M ldi MENUE,13 ENDE_MENUE_M: rjmp NO_BUTTON PONE: ldi ADD_TEMP,0 mov INPUT_DELAY,ADD_TEMP cpi MENUE,0 brne CHECK_MENUE_1 cbr AUTO_STATE,1 sbrc TEMP,5 sbr AUTO_STATE,1 rjmp NO_BUTTON CHECK_MENUE_1: cpi MENUE,1 brne CHECK_MENUE_2 cbr AUTO_STATE,2 sbrc TEMP,5 sbr AUTO_STATE,2 rjmp NO_BUTTON CHECK_MENUE_2: cpi MENUE,2 brne CHECK_MENUE_3 cbr AUTO_STATE,4 sbrc TEMP,5 sbr AUTO_STATE,4 sbrc TEMP,3 sbi PORTB,1 rjmp NO_BUTTON CHECK_MENUE_3: cpi MENUE,3 brne CHECK_MENUE_4 sbrc TEMP,3 rjmp SPEED_NOT_P inc SPEED ldi ADD_TEMP,0 cp SPEED,ADD_TEMP brne SPEED_NOT_P dec SPEED SPEED_NOT_P: sbrc TEMP,5 rjmp SPEED_NOT_M dec SPEED ldi ADD_TEMP,255 cp SPEED,ADD_TEMP brne SPEED_NOT_M inc SPEED SPEED_NOT_M: rjmp NO_BUTTON CHECK_MENUE_4: cpi MENUE,4 brne CHECK_MENUE_5 sbrc TEMP,3 rjmp MASTER_NOT_P inc MASTER ldi ADD_TEMP,0 cp MASTER,ADD_TEMP brne MASTER_NOT_P dec MASTER MASTER_NOT_P: sbrc TEMP,5 rjmp MASTER_NOT_M dec MASTER ldi ADD_TEMP,255 cp MASTER,ADD_TEMP brne MASTER_NOT_M inc MASTER MASTER_NOT_M: rjmp NO_BUTTON CHECK_MENUE_5: cpi MENUE,5 brne CHECK_MENUE_X sbrc TEMP,3 rjmp C_MASTER_NOT_P inc CASER_MASTER ldi ADD_TEMP,0 cp CASER_MASTER,ADD_TEMP brne C_MASTER_NOT_P dec CASER_MASTER C_MASTER_NOT_P: sbrc TEMP,5 rjmp C_MASTER_NOT_M dec CASER_MASTER ldi ADD_TEMP,255 cp CASER_MASTER,ADD_TEMP brne C_MASTER_NOT_M inc CASER_MASTER C_MASTER_NOT_M: rjmp NO_BUTTON CHECK_MENUE_X: cpi MENUE,14 brsh NO_BUTTON sbrs TEMP,3 rcall SAVE_SZENE rjmp NO_DISPLAY_AKT NO_BUTTON: rcall DISPLAY_AKTUAL NO_DISPLAY_AKT: sbrc AUTO_STATE,0 rjmp DIREKT ldi TEMP,0 rcall sts1 rjmp SZENE DIREKT: lds TEMP,0x78 sts 0x70,TEMP lds TEMP,0x79 sts 0x71,TEMP lds TEMP,0x7A sts 0x72,TEMP lds TEMP,0x7B sts 0x73,TEMP lds TEMP,0x7C sts 0x74,TEMP lds TEMP,0x7D sts 0x75,TEMP lds TEMP,0x7E sts 0x76,TEMP lds TEMP,0x7F sts 0x77,TEMP SZENE: sbrs AUTO_STATE,1 rjmp CASER ldi ZH,0 ldi YH,0 ldi TEMP2,0 ;Fadernummer FADER_LOOP: ldi YL,0x78 add YL,TEMP2 ldi DELAY_TEMP,0 ;DMX_Nummer pro Szene SZENE_LOOP: ld TEMP,Y ;Faderwert hohlen mov mc8u,TEMP2 ldi mp8u,8 rcall mpy8u add m8uL,DELAY_TEMP out EEAR,m8uL sbi EECR,0 in TEMP3,EEDR mov mc8u,TEMP mov mp8u,TEMP3 rcall mpy8u ldi dv16uH,0 ldi dv16uL,255 rcall div16u ldi ZL,0x70 add ZL,DELAY_TEMP ld TEMP,Z ;Wert der schon im RAM ist hohlen cp TEMP,dres16uL brsh NO_AKTUAL st Z,dres16uL NO_AKTUAL: inc DELAY_TEMP cpi DELAY_TEMP,8 brlo SZENE_LOOP inc TEMP2 cpi TEMP2,8 brlo FADER_LOOP CASER: sbrs AUTO_STATE,2 rjmp CHECK_FLASH ldi YH,0 ldi TEMP2,0 CASER_LOOP: mov mc8u,CASER_POS ldi mp8u,8 rcall mpy8u add m8uL,TEMP2 out EEAR,m8uL sbi EECR,0 in TEMP,EEDR ldi YL,0x70 add YL,TEMP2 ld TEMP3,Y ;Begin Multiply TEMP with CASER_MASTER mov mc8u,TEMP mov mp8u,CASER_MASTER rcall mpy8u ldi dv16uH,0 ldi dv16uL,255 rcall div16u mov TEMP,dres16uL ;End Multiply TEMP with CASER_MASTER cp TEMP3,TEMP brsh NO_NEW_VAULE st Y,TEMP NO_NEW_VAULE: inc TEMP2 cpi TEMP2,8 brlo CASER_LOOP ;Check LED ldi ADD_TEMP,0 cp CASER_POS,ADD_TEMP breq LED_ON sbi PORTB,1 rjmp NO_LED_WEITER LED_ON: cbi PORTB,1 NO_LED_WEITER: nop ;Check CASER_POS for inc ldi ADD_TEMP,1 cp CASER_DELAY,ADD_TEMP brsh NO_CASERPOS_INC mov CASER_DELAY,SPEED com CASER_DELAY inc CASER_POS ldi ADD_TEMP,8 cp CASER_POS,ADD_TEMP brlo END_CASERPOS_INC ldi ADD_TEMP,0 mov CASER_POS,ADD_TEMP rjmp END_CASERPOS_INC NO_CASERPOS_INC: dec CASER_DELAY END_CASERPOS_INC:nop CHECK_FLASH: sbic PINB,6 rjmp MASTER_J ldi TEMP,255 rcall sts1 MASTER_J: ldi YH,0x00 ldi YL,0x70 MASTER_J_LOOP: ld mc8u,Y mov mp8u,MASTER rcall mpy8u ldi dv16uH,0 ldi dv16uL,255 rcall div16u st Y,dres16uL inc YL cpi YL,0x78 brlo MASTER_J_LOOP sbic PINB,7 rjmp MAIN ldi TEMP,0 rcall sts1 rjmp MAIN .exit